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CLC014_03资料

2021-01-25 来源:爱站旅游
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CLC014AdaptiveCableEqualizerforHigh-SpeedDataRecoveryAugust2003

CLC014

AdaptiveCableEqualizerforHigh-SpeedDataRecovery

GeneralDescription

National’sCLC014adaptivecableequalizerisalow-costmonolithicsolutionforequalizingdatatransmittedovercable(oranymediawithsimilardispersivelosscharacteristics).TheCLC014simplifiesthetaskofhigh-speeddatarecoverywithaone-chipsolutionandaminimalnumberofexternalcomponents.Theequalizerautomaticallyadaptstoequalizeanycablelengthfromzerometerstolengthsthatattenuatethesignalby40dBat200MHz.Thiscorrespondsto300metersofBelden8281or120metersofCategory5UTP(unshieldedtwistedpair).

TheCLC014providessuperiorjitterperformance:180psppfor270Mbpsdatathathaspassedthrough200metersofBelden8281cable.Thisexceptionalperfor-manceprovideswideerrormarginindigitaldatalinks.Theequalizeroperatesonasinglesupplywithapowerconsumptionofonly290mW.Thesmall14-pinSOICpack-ageallowsforhigh-densityplacementofcomponentsformulti-channelapplicationssuchasrouters.Theequalizeroperatesoverawiderangeofdataratesfromlessthan50Mbpstoratesinexcessof650Mbps.

Theequalizerisflexibleinallowingeithersingle-endedordifferentialinputdrive.Itshighcommonmoderejectionpro-videsexcellentimmunitytointerferencefromnoisesources.On-chipquantizedfeedbackeliminatesbaselinewander.Additionalfeaturesincludeacarrierdetectoutputandanoutputmutepinwhich,whentiedtogether,mutetheoutputwhennosignalispresent.Abufferedeyemonitoroutputisprovided,forviewingtheequalizedsignalpriortothecom-parator.DifferentialAECpinsallowtheusertosettheinter-naladaptivelooptimeconstantwithoneexternalcapacitor.Also,theCLC014isinsensitivetothepathologicalpatternsinherentinthevideoindustrystandards.

Features

nnnnnn

AutomaticequalizationofcoaxialandtwistedpaircablesCarrierdetectionandoutputmuteOutputeyemonitor

Singlesupplyoperation:+5Vor−5.2VSingle-endedordifferentialinputLowcost

Applications

nSMPTE259Mserialdigitalinterfaces:NTSC/PAL,4:2:2componentandwidescreen;also540Mbps(4:4:4:4)nSerialdigitalvideoroutinganddistributionnSerialdigitaldataequalizationandreceptionnDatarecoveryequalization:ATM,CADnetworks,medical,settopterminals,industrialvideonetworks

KeySpecifications

nLowjitter:180pspp@270Mbpsthrough200metersofBelden8281coaxialcable

nHighdatarates:<50Mbpsto>650MbpsnExcellentinputreturnloss:19dB@270MHznLowsupplycurrent:58mA

nEqualizesupto300+metersofBelden8281or120metersofCat5UTPcable

TypicalApplication

10005604

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CLC014TypicalApplication(Continued)After EqualizationVertical scale: 200mV/divBefore EqualizationVertical scale: 200mV/div270Mbps data through 300m of Belden 8281 coax cable10005602270Mbps data through 300mof Belden 8281 coax cable10005603ConnectionDiagramPinoutSOIC1000560114-PinSOICOrderNumberCLC014AJESeeNSPackageNumberM14Awww.national.com2

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CLC014AbsoluteMaximumRatings

(Note1)

IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheNationalSemiconductorSalesOffice/Distributorsforavailabilityandspecifications.SupplyVoltage(VCC–VEE)MaximumJunctionTemperatureStorageTemperatureRangeLeadTemperature(Soldering4sec.)ESDRating(Note14)θJA14-PinSOIC(AJE)

MTTF(basedonlimitedlifetestdata)

−0.3V,+6.5V

+150˚C

−65˚Cto+150˚C

+260˚C

SeriesInputResistance(InSeriesw/DI&DI)InputCouplingCapacitanceAECCapacitor(ConnectedbetweenAEC+&AEC−)CableInputVoltageSwing(Note4)DO/DOMinimumVoltage(Note15)

100Ω1.0µF

50pFto1µF720to880mVppVCC–1.6V

<500V

95˚C/W

4.8x107hours

RecommendedOperatingConditions

SupplyVoltage(VCC–VEE)OperatingTemperatureRange

4.5Vto5.5V−40˚Cto+85˚C

ElectricalCharacteristics

(VCC=+5V,VEE=0V,signalsourceswing=0.8Vpp(Note4),CAEC=100pF)

Parameter

DYNAMICPERFORMANCEResidualJitter

100metersBelden8281200metersBelden8281300metersBelden8281EqualizationTimeConstant100metersBelden8281200metersBelden8281300metersBelden8281

outputriseandfalltime(20%–80%)outputdutycycledistortionminimumaveragetransitiondensitymaximumaveragedatarateVCCJitterSensitivity27MHz270MHz

VEEJitterSensitivity27MHz270MHz

STATICPERFORMANCE

SupplyCurrent(IncludesOutputCurrent)VAEC=0VVAEC=0.4V

InputandOutputParametersDO/DOoutputcurrentDO/DOoutputvoltageswingDI/DIcommonmodevoltageAECdifferentialvoltage

Belden8281

3

Conditions

Typ+25˚CMin/Max+25˚C

Min/Max−40˚Cto+85˚C

Units

270MbpsPRN(Note5)270MbpsPRN(Note5)270MbpsPRN(Notes3,5)CAEC=100pF(Note6)CAEC=100pF(Note6)CAEC=100pF(Note6)Rcollector=75Ω

1501803501.52.03.2750301/50

250250500___________

400400750___________

pspppspppsppµsµsµspspstrans/nsMbpsns/Vns/Vns/Vns/V

150mBelden8281(Note7)6500.851.900.551.45

(Note3)(Note3)

585310

48/6843/648.7/11.3650/850

__

40/7537/708.0/12600/900

__

mAmAmAmVVmV/meter

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Rcollector=75Ω(Note3)

7503.41.5

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CLC014ElectricalCharacteristics

(VCC=+5V,VEEParameter

AEC+/AEC−commonmode

outputeyemonitor(OEM)biaspotentialcarrierdetect(CD)currentoutput-HIGHcarrierdetect(CD)currentoutput-LOWMUTEvoltageinput-HIGHMUTEvoltageinput-LOWMUTEcurrentinput-HIGHMUTEcurrentinput-LOWTIMINGPERFORMANCECDResponseTimecarrierappliedcarrierremovedMUTEresponsetime

MISCELLANEOUSPERFORMANCEinputresistanceinputcapacitance

inputreturnloss@270MHzmaximumcableattenuation

(Continued)

=0V,signalsourceswing=0.8Vpp(Note4),CAEC=100pF)

Conditions

Typ+25˚C3.63.2

CDVOH=4.5VCDVOL=0.5V(Note3)(Note3)

VIH=5V(Note3)VIL=0V(Note3)

−4006001.81.25.00.2

Min/Max+25˚C

____2.00.8

Min/Max−40˚Cto+85˚C

____2.00.8

UnitsVVµAµAVVnAnA

±100±100±500±500

(Note8)(Note9)(Note10)single-ended

single-ended(Note11)Zo=75Ω(Note12)200MHz(Note13)

1.0122.07.31.01940

_______

_______

µsµsnskΩpFdBdB

Note1:“AbsoluteMaximumRatings”arethosevaluesbeyondwhichthesafetyofthedevicecannotbeguaranteed.Theyarenotmeanttoimplythatthedevicesshouldbeoperatedattheselimits.Thetableof“ElectricalCharacteristics”specifiesconditionsofdeviceoperation.

Note2:Min/maxratingsarebasedonproductcharacterizationandsimulation.Individualparametersaretestedasnoted.Outgoingqualitylevelsaredeterminedfromtestedparameters.

Note3:J-level:spec.is100%testedat+25˚C.

Note4:Thesespecificationsassumean800mVppsignalatthecableinput.Levelsaboveandbelow800mVareallowable,butperformancemayvary.Thecablewillattenuatethesignalpriortoenteringtheequalizer.Note5:Peak-to-peakjitterisdefinedas6timesthermsjitter.

Note6:Formoreinformation,see“CLC014Operation”and“DesignGuidelines”.Note7:50%eyeopening.

Note8:TimefromapplicationofavalidsignaltowhentheCDoutputassertshigh.Note9:TimefromtheremovalofavalidsignaltowhentheCDoutputassertslow.Note10:TimefromassertionofMUTEtowhentheoutputresponds.Note11:Deviceonly.Doesnotincludetypicalpcboardparasitics.Note12:Includestypicalpcboardparasitics.

Note13:Thissetsthemaximumcablelengthfortheequalizer.

Note14:Humanbodymodel,1.5kΩinserieswith100pF;basedonlimitedtestdata.Note15:Tomaintainspecifiedperformance,donotreduceDO/DObelowthislevel.

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CLC014TypicalPerformanceCharacteristicsBefore Equalization:100m of Belden 8281 Coaxial CableAfter Equalization:100m of Belden 8281 Coaxial CableData Rate: 270Mbps Time (1ns/div)10005605Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 270Mbps Time (1ns/div)10005608Before Equalization:200m of Belden 8281 Coaxial CableAfter Equalization:200m of Belden 8281 Coaxial CableData Rate: 270Mbps Time (1ns/div)10005606Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 270Mbps Time (1ns/div)10005609Before Equalization:300m of Belden 8281 Coaxial CableAfter Equalization:300m of Belden 8281 Coaxial CableData Rate: 270Mbps Time (1ns/div)10005607Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 270Mbps Time (1ns/div)100056105www.national.com

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CLC014TypicalPerformanceCharacteristicsBefore Equalization:100m Category 5 UTP at 51.7Mbps(Continued)After Equalization:100m Category 5 UTP at 51.7MbpsData Rate: 51.7Mbps Time (6ns/div)10005611Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 51.7Mbps Time (6ns/div)10005614Before Equalization:100m Category 5 UTP at 155MbpsAfter Equalization:100m Category 5 UTP at 155MbpsData Rate: 155Mbps Time (2ns/div)10005612Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 155Mbps Time (2ns/div)10005615Before Equalization:100m Category 5 UTP at 311MbpsAfter Equalization:100m Category 5 UTP at 311MbpsData Rate: 311Mbps Time (1ns/div)10005613Equalizer Output (200mV/div)Equalizer Input (200mV/div)Data Rate: 311Mbps Time (1ns/div)10005616www.national.com6

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CLC014TypicalPerformanceCharacteristicsMaximum Data Rate* vs. Cable Length (Typical)800(Continued)Jitter vs. Cable Length500400300200100Data Rate: 270Mbps00501001502002503001000561810005617Maximum Data Rate (Mbps)600400200*Max data rate for 50% eye opening.Eye boundary defined as point whereBER = 1 x 10-9.1002003004005000Peak-to-Peak Jitter (ps)Belden 8281 Cable Length (m)Belden 8281 Cable Length (m)Return Loss0Magnitude (5dB/div)DIDI-25-500100M200M300M400M500M10005619Frequency (Hz)7www.national.com

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CLC014PinDefinitions

NameDI,DIDO,DOAEC+,AEC−

Pin#8,913,146,7

Description

Differentialdatainputs.Differentialcollectordataoutputs(ECLcompatible).AECloopfilterpins.Acapacitorconnected

betweenthesepinsgovernstheloopresponsefortheadaptiveequalizationloop.3

Eyemonitoroutput.Theoutputoftheequalizationfilter.

Carrierdetect.(Lowwhennosignalispresent).

OutputMUTE.(Activelow.)Carrierdetectmaybetiedtothispintoinhibittheoutputwhennosignalispresent.

VCCVEE1,2,Positivesupplypins(ground4or+5V).10,11Negativesupplypins(−5.2V

orground).

BLOCKDESCRIPTION

TheCLC014isanadaptiveequalizerthatreconstructsserialdigitaldatareceivedfromtransmissionlinessuchascoaxialcableortwistedpair.Itstransferfunctionapproximatesthereciprocalofthecablelosscharacteristic.TheblockdiagraminFigure2depictsthemainsignalconditioningblocksforequalizingdigitaldataatthereceivingendofacable.TheCLC014receivesbasebanddifferentialorsingle-endeddigi-talsignalsatitsinputsDIandDI.TheEqualizerblockisatwo-stageadaptivefilter.Thisfilteriscapableofequalizingcablelengthsfromzerometerstolengthsthatrequire40dBofboostat200MHz.

TheQuantizedFeedbackComparatorblockreceivesthedifferentialsignalsfromtheequalizerfilterblock.Thisblockincludestwocomparators.Thefirstcomparatorincorporatesaself-biasingDCrestorecircuit.Thisisfollowedbyasecondhigh-speedcomparatorwithoutputmutecapability.Thesec-ondcomparatorreceivesandslicestheDC-restoreddata.ItsoutputsDOandDOaretakenfromthecollectorsoftheoutputtransistors.MUTElatchesDOandDOwhenaTTLlogiclowlevelisapplied.

TheAdaptiveServoControlblockproducesthesignalforcontrollingthefilterblock,andoutputsavoltageproportionaltocablelength.Itreceivesdifferentialsignalsfromtheoutputofthefilterblockandfromthequantized-feedbackcompara-tor(QFBC)todevelopthecontrolsignal.TheservoloopresponseiscontrolledbyanexternalcapacitorplacedacrosstheAEC+andAEC−pins.Itsoutputvoltage,asmeasureddifferentiallyacrossAEC+andAEC−,isroughlyproportionaltothelengthofthetransmissionline.ForBelden8281coaxialcablethisdifferentialvoltageisabout1.5mV/meter.Oncethisvoltageexceeds500mV,noaddi-tionalequalizationisprovided.

TheCarrierDetect(CD)blockmonitorsthesignalpoweroutoftheequalizingfilterandcomparesittoaninternalrefer-encetodetermineifavalidsignalispresent.ACMOShighoutputindicatesthatdataispresent.TheoutputofCDcanbeconnectedtotheMUTEinputtoautomaticallylatchtheoutputs(DOandDO),preventingrandomtransitionswhennodataispresent.

TheOutputEyeMonitor(OEM)providesasingle-endedbufferedoutputforobservingtheequalizedeyepattern.TheOEMoutputisalowimpedancehigh-speedvoltagedrivercapableofdrivinganAC-coupled100Ωload.

OEM

CDMUTE512

Operation

TheCLC014AdaptiveCableEqualizerprovidesacompletesolutionforequalizinghigh-bit-ratedigitaldatatransmittedoverlongtransmissionlines.Thefollowingsectionsfurnishdesignandapplicationinformationtoassistincompletingasuccessfuldesign:

•BlockdiagramexplanationoftheCLC014

•Recommendedstandardinputandoutputinterfacecon-nections

•CommonapplicationsfortheCLC014

•Measurement,PClayout,andcableemulationboxesForapplicationsassistanceintheU.S.,call800-272-9959tocontactatechnicalstaffmember.

10005620

FIGURE1.CLC014EqualizerApplicationCircuit

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CLC014Operation

(Continued)

DIFFERENTIALINPUTINTERFACE:TwistedPairArecommendeddifferentialinputinterfaceisshowninFig-ure4.Propervoltagelevelsmustbefurnishedtotheinputpinsandthepropercableterminatingimpedancemustbeprovided.ForCategory5UTPthisisapproximately100Ω.Figure4showsageneralizednetworkwhichmaybeusedtoreceivedataoveratwistedpair.ResistorsR1andR2providetheproperterminatingimpedanceandsignalleveladjust-ment.TheblockingcapacitorsprovideACcouplingoftheattenuatedsignallevels.TheplotsintheTypicalPerfor-manceCharacteristicssectiondemonstratevariousequal-izeddataratesusingCategory5UTPat100meterlengths.Afullschematicofarecommendeddriverandreceivercir-cuitfor100ΩCategory5UTPisprovidedintheTypicalApplicationssectionwithfurtherexplanation.

10005621

FIGURE2.CLC014BlockDiagram

DEVICETESTING

PerformanceorcompliancytestingoftheCLC014withCableClonesisnotallowed.Useofthesedevicesiscon-trarytotheproduct’sspecificationsandtestprocedures.Testingforproductspecificationsorperformanceusingcableclonesisinvalidsincecablecloneshaveadifferentfre-quencyresponsethantheactualcable.Testingwithfulllengthcablesamplesisrecommended.

10005624

FIGURE4.TwistedPairInputInterface

InputInterfacing

TheCLC014acceptseitherdifferentialorsingle-endedinputvoltagespecifiedinStaticPerformance.Thefollowingsec-tionsshowseveralsuggestionsforinterfacesfortheinputsandoutputsoftheCLC014.

SINGLE-ENDEDINPUTINTERFACE:75ΩCoaxialCableTheinputisconnectedsingle-endedtoeitherDIorDIasshowninFigure3.Balancingunusedinputshelpstolessentheeffectsofnoise.Usetheequivalentterminationof37.5Ωtobalancetheinputimpedanceseenbyeachpin.Italsohelpstoterminategroundsatacommonpoint.ResistorsRxandRyarerecommendedforoptimumperformance.Theequalizerinputsareself-biasing.SignalsshouldbeACcoupledtotheinputsasshowninFigure3.

OutputInterfacing

TheoutputsDOandDOproduceECLlogiclevelswhentherecommendedoutputterminationnetworksareused.TheDOandDOpinsarenotcomplementaryemittercoupledlogicoutputs.Instead,theoutputsaretakenoffofthecol-lectorsofthetransistors.Therefore,caremustbetakentomeettheinterfacethresholdlevelsrequiredbyECLfamilies.RecommendedinterfacesforstandardECLfamiliesareshowninthefollowingcircuits.

DIFFERENTIALLOAD-TERMINATEDOUTPUTINTERFACE

Figure5showsarecommendedcircuitforimplementingadifferentialoutputthatisterminatedattheload.Adiodeor75Ωresistorprovidesavoltagedropfromthepositivesupply(+5VforPECLorGroundforECLoperation)toestablishproperECLlevels.Theresistorsterminatethecabletothecharacteristicimpedance.Theoutputvoltageswingisdeter-minedbytheCLC014outputcurrent(10mA)timestheterminationresistor.ForthecircuitinFigure5,thenominaloutputvoltageswingis750mV.

10005622

FIGURE3.Single-Ended75ΩCableInputInterface

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CLC014OutputInterfacing

(Continued)

10005627

FIGURE7.AlternativeLoadTerminated

OutputInterface

10005625

FIGURE5.DifferentialLoadTerminated

OutputInterface

DIFFERENTIALSOURCE-TERMINATEDOUTPUTINTERFACE

Figure6issimilartoFigure5exceptthattheterminationisprovidedatthesource.Thisconfigurationmayalsobeusedforsingle-endedapplications.However,theunusedoutputmuststillbeterminatedasshown.

DesignGuidelines

SELECTINGTHEAUTOMATICEQUALIZERCAPACITORTheAECcapacitorsetsthelooptimeconstantτfortheequalizer’sadaptiveloopresponsetime.Thefollowingfor-mulaisusedtosetthelooptimeconstant:

τ=R•CAEC•10−6Risaconversionfactorthatissetbyinternalequalizerparametersandcablelength.ForBelden8281coaxialcable,theRvaluesare(τ=µs,CAECinpF):

CableLength100meters200meters300meters

RValue(Ohms)150002000032000

Forexample,aCAECvalueof100pFresultsinanadaptivelooptimeconstantof2µsat200metersofcable.CONNECTIONANDOPERATIONOFCDANDMUTECarrierDetect(CD)isaCMOSoutputthatindicatesthepresenceofequalizeddatafromthefilter.ThisCDoutputcanbeconnectedtoMUTEtosuspendchangesinthedataoutputsDOandDO,ifnovalidsignalexists.Thissimpleconfigurationpreventsrandomoutputtransitionsduetonoise.ForsparsetransitionpatternsitisrecommendedthatacapacitorbeconnectedtoCDasshowninFigure1.

Addacapacitortopin5toslowtheresponsetimeofCarrierDetectwhenCarrierDetectisconnectedtoMUTE.Thecapacitorreducessensitivitytopathologicalpatterns.Patho-logicalpatternsaredefinedassparsedatasequenceswithfewtransitions.

OUTPUTEYEMONITOROEMCONNECTIONS

TheOEMisahigh-speed,bufferedoutputformonitoringtheequalizedeyepatternpriortotheoutputcomparator.ItsoutputisdesignedtodriveanAC-coupled50Ωcoaxialcablewithaseries50Ωbackmatchresistor.Thecableshouldbeterminatedwith50Ωattheoscilloscope.Figure1showsaschematicwithatypicalconnection.

10005626

FIGURE6.DifferentialSourceTerminated

OutputInterface

TERMINATINGPHYSICALLYSEPARATEDOUTPUTSWhenthetwooutputsmustberoutedtophysicallyseparatelocations,thecircuitinFigure6maybeapplied.Alterna-tively,ifloadterminationisdesired,thecircuitinFigure7maybeused.Theresistivedividernetworkprovides75ΩterminationandestablishesproperECLlevels.Thiscircuitconsumesslightlymorepowerthanthepreviouscircuits.

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CLC014DesignGuidelines

MINIMUMDATATRANSITIONS

(Continued)

TheCLC014specifiesaminimumtransitionrate.FortheCLC014thissetstheminimumdataratefortransmittingdatathroughanycablemedium.TheCLC014minimumaveragetransitiondensityisfoundintheElectricalCharacteristicssectionofthedatasheet.

POWERSUPPLYOPERATIONANDTHERMALCONSIDERATIONS

TheCLC014operatesfromeither+5Vor−5.2Vsinglesup-plies.RefertoFigure1whenoperatingthepartfrom+5V.Whenoperatingwitha−5.2Vsupply,theVEEpinsshouldbebypassedtoground.Theevaluationboardandassociatedliteratureprovideforoperationfromeithersupply.

Maximumpowerdissipationoccursatminimumcablelength.Underthatcondition,ICC=58mA.Totalpowerdissipated:

PT=(58mA)(5V)=290mW

Powerintheload:

PL=(0.7V)(11mA)+(37.5)(11mA)2=12mWMaximumpowerdissipatedonthedie:PDMAX=PT–PL=278mWJunctionTemperature=

(θJA)(278mW)+TA=TA+26˚C

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CLC014LayoutandMeasurement

TheprintedcircuitboardlayoutfortheCLC014requiresproperhigh-speedlayouttoachievetheperformancespeci-ficationsfoundinthedatasheet.Thefollowinglistcontainsafewrulestofollow:

1.Useagroundplane.2.

Decouplepowerpinswith0.1µFcapacitorsplaced≤0.1”(3mm)fromthepowerpins.

3.DesigntransmissionstriplinesfromtheCLC014’sinput

andoutputpinstotheboardconnectors.4.Routeoutputsawayfrominputs.5.

Keepgroundplane≥0.025”(0.06mm)awayfromtheinputandoutputpads.

Figure8showsablocklevelmeasurementdiagram,whileFigure15ondepictsadetailedschematic.Apseudo-randompatterngeneratorwithlowoutputjitterwasusedtoprovideaNRZIpatterntocreatetheeyediagramsshownintheTypi-calPerformanceCharacteristicssection.

Sincemostpatterngeneratorshavea50Ωoutputimped-ance,atranslationcanbeaccomplishedusingaCLC006CableDriverasanimpedancetransformer.Awideband-widthoscilloscopeisneededtoobservethehighdatarateeyepattern.Whenmonitoringasingleoutputthatistermi-natedatboththeequalizeroutputandtheoscilloscope,theeffectiveoutputloadis37.5Ω.Consequently,thesignalswingishalfthatobservedforasingle-ended75Ωtermination.

10005628

FIGURE8.TypicalMeasurementBlock

Troubleshootingwithscopeprobescanaffecttheequaliza-tion.Forhighdatarates,usealowcapacitanceprobewithlessthan2pFprobecapacitance.EvaluationboardsandliteratureareavailableforquickprototypingandevaluationoftheCLC014AdaptiveCableEqualizer.TheCLC014con-tainsCMOSdevicesandoperatorsshouldusegroundingstrapswhenhandlingtheparts.

Figure9showstheCLC014’sinternalpowersupplyrouting.BypassVCC(pin4)by:

•Monolithiccapacitorofabout0.1µFplacedlessthan0.1”(3mm)fromthepin

•Tantalumcapacitorofabout6.8µFforlargecurrentsignalswingsplacedascloseasconvenienttotheCLC014

10005629

FIGURE9.PowerPackageRoutingFixture

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CLC014LayoutandMeasurement

(Continued)

CABLEEMULATIONBOXES

Somecableemulationboxeswillnotmimiccablescorrectly.WhenevaluatingtheCLC014,itisstronglyrecommendedthatactualcablebeusedtodeterminethevariousperfor-manceparameters.

TominimizeringingattheCLC014’sinputs,placea100Ωresistorinserieswiththeinput.Thisresistorreducesinduc-tanceeffects.

Severallayouttechniquescanimprovehighspeedperfor-mance:

•Keepinput,outputandAECtraceswellseparated•Usebalancedinputtermination’s

TypicalApplications

COAXIALCABLERECEIVER(Page1)

TheCLC014equalizerapplicationshownonpage1willequalizeavarietyofcoaxialcablesuptolengthsthatattenu-atethesignalby40dBat200MHz.TheapplicationshowstheproperconnectionforasinglecabledrivenwithaCLC006driver.CarrierDetect(CD)isconnectedtoMUTEtolatchoutputsDOandDOintheabsenceofaninputsignaltotheequalizer.

RefertotheCLC014’sevaluationboardlayoutforadditionalsuggestions.

Nationalcansupplymostofthemajorcomponentsrequiredtodesignatransmissionlinerepeater.Figure11showsatypicalrepeaterdesignusingtheCLC006,CLC014,andtheCLC016.Thedesignfunctionssupportedbyeachchipare:CLC006:Cableconnectionchip

Boostsdrivefortransmissiontonextrepeaterorfinaldestinations

CLC014:Receiveserializeddigitaldatafromincoming

transmissionlines

Equalizestheincomingdata

CLC016:Retimestheequalizeddata(improvingjitter)TheCLC016isamulti-ratedataretimingPLL.Thecircuit(Figure11)willworkatupto4differentdatarateswithnoadditionalcomponentsormanualtuning.

•AvoidroutingtracesclosetotheCLC014’sinputtrace•Maintaincommonreturnpointsforcomponents•Useguardtraces

TheinputlinesoftheCLC014usea100Ωseriesresistorsattheinputpins.Thisdecreasestheinductiveeffectsinternaltotheparttoreduceringingonfastriseandfalltimes.RefertotheevaluationboardlayoutforfurthersuggestionsonlayoutfortheCLC014AdaptiveEqualizer.

EQUALIZATIONCURVE

TheCLC014AdaptiveCableEqualizerhasamaximumequalizationresponseasshowninFigure10.Thisresponsemaybeobtainedbyforcing>0.5VdifferentiallyattheAECpins.

Magnitude (5dB/div)10k100k1M10M100M1G10005630

Frequency (Hz)

FIGURE10.MaximumEqualizationResponse

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CLC014TypicalApplications

(Continued)

10005631

FIGURE11.TypicalRepeaterDesign

DIGITALVIDEO(SDV)ROUTERS

TheCLC014providesperformancethatcomplieswiththeSMPTE259Mstandardforserialdigitalvideo(SDV)trans-missionovercoaxialcable.OnecommonapplicationisinSDVrouters,whichprovideaswitchingmatrixforconnectingvideosourceequipment(e.g.,cameras)todestinationequip-ment(e.g.,videotaperecorders,monitors,etc.).

Figure12showsatypicalconfigurationforanSDVrouter,includingequalizers,acrosspointswitch,dataretimers,andcabledrivers.TheCLC014isusedinitsstandardconfigu-rationinthisapplication,andautomaticallyequalizescablelengthsfromzerometerstogreaterthan300metersat360MHz(seeplotsinTypicalPerformanceCharacteris-ticssection).Theequalizedoutputsareconnectedtothedifferentialinputsofthecrosspointswitch.TheCLC016DataRetimerreceivesthedatafromthecrosspointandperformstheclockanddatarecoveryfunctions,furtherreducingjitter.Finally,theretimeddataisdrivenintothecoaxialcablebyaCLC006CableDriver(withtwoamplitude-adjustableout-puts)oraCLC007CableDriver(withfouroutputs).

10005632

FIGURE12.VideoRoutingBlockDiagram

TWISTEDPAIRDRIVER

Alow-costmediumfortransmittingdataistwistedpair.Cat-egory5UTPhasanattenuationcharacteristicsimilartoBelden8281coaxialcablebutscaledinlength:120metersofCategory5UTPisroughlyequivalentto300metersofBelden8281cable.Whenproperlyimplemented,theCLC014willequalizedataratesupto625MbpsoverCat-egory5UTP.Themaximumdataratedependsuponthecablelength.AplotofMaximumDataRatevsCableLengthisfoundintheTypicalPerformanceCharacteristicssec-tionforBelden8281,andcanbescaledasstatedabovetoestimatemaximumcablelengthsanddataratesforUTP.

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CLC014TypicalApplications

(Continued)

Category5UTPhasacharacteristicimpedanceofapproxi-mately100Ω.TheCLC006inFigure13isusedtodrivethetwistedpairAC-coupledwithaseries0.1µFcapacitoranda50Ωresistorineachdifferentialoutput.TheCLC014Adap-tiveEqualizerrequires800mVppfromthetransmitsideofthecable.AvoltagedividerisnecessarytoscalethevoltagetotherequiredlevelattheinputoftheCLC014.Thisresistornetworkalsoprovidesthecorrectimpedancematchfortwistedpair.

ForCategory5UTP,theapproximateAECvoltageperlengthis3.75mV/m(seeBlockDescription).TheCLC006providesatrimadjustforfinetuningtheoutputsignalwiththeresistorR.RefertotheCLC006/007datasheetfortuningdirections.

10005634

10005633

FIGURE13.TwistedPairEqualization

FIGURE14.BeforeandAfterEqualizationat622Mbps

Through50MetersofCategory5UTP

10005635

FIGURE15.TypicalMeasurementSetup

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CLC014EvaluationBoard

EvaluationboardsareavailableforanominalchargethatdemonstratethebasicoperationoftheSDI/SDV/SDHde-vices.TheevaluationboardscanbeorderedthroughNation-al’sDistributors.Suppliesarelimited,pleasecheckforcur-rentavailability.

TheSD014EVKevaluationkitfortheCLC014,AdaptiveCableEqualizerforHigh-SpeedDataRecovery,providesanoperatingenvironmentinwhichthecableequalizercanbeevaluatedbysystem/hardwaredesigners.TheevaluationboardhasalltheneededcircuitryandconnectorsforeasyconnectionandcheckoutofthedevicecircuitoptionsasdiscussedintheCLC014datasheet.Aschematic,partslistandpictorialdrawingareprovidedwiththeboard.

FromtheWWW,thefollowinginformationmaybeviewed/downloadedformostevaluationboards:www.national.com/appinfo/interface

•DeviceDatasheetand/orEVKUserManual

••••ViewViewViewViewapictureoftheEVKtheEVKSchematic

thetopassemblydrawingandBOMthebottomassemblydrawingandBOM

PCBLAYOUT

TheCLC014requiresproperhigh-speedlayouttechniquestoobtainbestresults.AfewrecommendedlayoutrulestofollowforbestresultswhenusingtheCLC014AdaptiveCableEqualizerare:1.2.

Useagroundplane.

Decouplepowerpinswith0.01µFcapacitorsplaced≤0.1”(3mm)fromthepowerpins.

3.Designtransmissionlinestotheinputsandoutputs.4.Routeoutputsawayfrominputs.5.

Removegroundplane≥0.025”(0.06mm)fromtheinputandoutputpads.

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CLC014AdaptiveCableEqualizerforHigh-SpeedDataRecoveryPhysicalDimensions

unlessotherwisenoted

inches(millimeters)

14-PinSOIC

OrderNumberCLC014AJENSPackageNumberM14A

LIFESUPPORTPOLICY

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2.Acriticalcomponentisanycomponentofalifesupportdeviceorsystemwhosefailuretoperformcanbereasonablyexpectedtocausethefailureofthelifesupportdeviceorsystem,ortoaffectitssafetyoreffectiveness.

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Nationaldoesnotassumeanyresponsibilityforuseofanycircuitrydescribed,nocircuitpatentlicensesareimpliedandNationalreservestherightatanytimewithoutnoticetochangesaidcircuitryandspecifications.

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