N-channel 20 V, 0.030 Ω, 5 A SO-8
2.7 V, drive STripFET™ II Power MOSFET
Features
Order codeSTS5DNF20V
■■
VDSS20 V
RDS(on) max.< 0.040Ω @ 4.5 V< 0.045Ω @ 2.7 V
ID5 A
Ultra low threshold gate drive (2.7 V)Standard outline for easy automated surface mount assembly
SO-8Applications
Switching application
Description
The STS5DNF20V is a N-channel STripFET™ II. This Power MOSFET is the latest development of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Figure 1.Internal schematic diagramTable 1.Device summary
Marking5DNF20V
PackageSO-8
PackagingTape and reel
Order codeSTS5DNF20V
May 2011Doc ID 7608 Rev 61/12
www.st.com
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ContentsSTS5DNF20V
Contents
12
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
345
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STS5DNF20VElectrical ratings
1 Electrical ratings
Table 2.
SymbolVDSVGSIDIDIDM (1)PTOTPTOT
Absolute maximum ratings
Parameter
Drain-source voltage (VGS = 0)Gate-source voltage
Drain current (continuos) at TC = 25 °CDrain current (continuos) at TC = 100 °CDrain current (pulsed)Total dissipation at TC = 25 °C
(dual operation)
Total dissipation at TC = 25 °C (single operation)
Value20±1253201.62
UnitVVAAAWW
1.Pulse width limited by safe operating area
Table 3.
Symbol
Thermal data
Parameter
Thermal resistance junction-ambientsingle operation
Thermal resistance junction-ambient dual operation
Max. operating junction temperatureStorage temperature
Value62.578-55 to 150-55 to 150
Unit°C/W°C/W°C°C
Rthj-a
TJTstg
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Electrical characteristicsSTS5DNF20V
2 Electrical characteristics
(TCASE = 25 °C unless otherwise specified)Table 4.
SymbolV(BR)DSSIDSSIGSSVGS(th)RDS(on)
On/off states
Parameter
Drain-source
Breakdown voltageZero gate voltage
Drain current (VGS = 0)Gate-body leakagecurrent (VDS = 0)Gate threshold voltageStatic drain-source on resistance
Test conditionsID = 250 µA, VGS = 0VDS = Max rating
VDS = Max rating, TC=125 °CVGS = ± 12 V
VDS = VGS, ID = 250 µAVGS = 4.5 V, ID = 2.5 AVGS = 2.7 V, ID = 2.5 A
0.6
0.0300.037
0.0400.045
Min.20
110±100
Typ.
Max.
UnitVµAµAnAVΩΩ
Table 5.
SymbolCissCossCrssQgQgsQgd
Dynamic
Parameter
Input capacitanceOutput capacitanceReverse transfer capacitanceTotal gate chargeGate-source chargeGate-drain charge
VDS = 25 V, f = 1 MHz, VGS = 0
-Test conditions
Min.
Typ.460200508.5
-1.82.4
11.5Max.
UnitpFpFpFnCnCnC
VDD = 16 V, ID = 5 A,VGS = 4.5 V(see Figure13)
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STS5DNF20V
Table 6.
Symboltd(on)trtd(off)tf
Electrical characteristics
Switching times
Parameter
Turn-on delay time Rise time
Turn-off Delay TimeFall Time
Test conditionsVDD=10 V, ID=2.5A, RG=4.7Ω, VGS= 4.5V(see Figure12
Min.
Typ.7332710
Max.
Unitnsnsnsns
--
Table 7.
SymbolISDISDM (1)VSD (2)trrQrrIRRM
Source drain diode
Parameter
Source-drain currentSource-drain current (pulsed)Forward on voltageReverse recovery timeReverse recovery chargeReverse recovery current
ISD = 5 A, VGS = 0ISD = 5 A, VDD = 10 Vdi/dt = 100 A/µs,Tj = 150 °C(see Figure14)
Test conditions
Min.---26131Typ.
Max5201.2
UnitAAVnsnCA
-
1.Pulse width limited by safe operating area.2.Pulsed: pulse duration = 300 µs, duty cycle 1.5%
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Electrical characteristicsSTS5DNF20V
2.1 Electrical characteristics (curves)
Figure 2.
Safe operating areaFigure 3.
Thermal impedance
Figure 4.
Output characteristicsFigure 5.
Transfer characteristics
Figure 6.
Source-drain diode forward
characteristicsFigure 7.
Static drain-source on resistance
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STS5DNF20VFigure 8.
Electrical characteristics
Capacitance variations
Gate charge vs gate-source voltageFigure 9.
Figure 10.Normalized gate threshold voltage
vs temperature Figure 11.Normalized on resistance vs
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Test circuitSTS5DNF20V
3 Test circuit
Figure 13.Gate charge test circuit
Figure 12.Switching times test circuit for
resistive load VDD12V220047kΩ100nF1kΩRLVGSPWVDRGD.U.T.μF3.3μFVDDVi=20V=VGMAX2200μFIG=CONST2.7kΩ47kΩPW1kΩ100ΩD.U.T.VGAM01468v1AM01469v1Figure 14.Test circuit for inductive load Figure 15.Unclamped Inductive load test
switching and diode recovery timescircuit ADGS25ΩD.U.T.BAFASTDIODEBAL=100μHBDG3.3μF1000μFLVD2200μF3.3μFVDDVDDIDRGSViD.U.T.PwAM01470v1AM01471v1Figure 16.Unclamped inductive waveform
Figure 17.Switching time waveform
V(BR)DSSVDtontdontrtofftdofftfIDMIDVDDVDD090%90%10%10%VDS90%VGSAM01472v1010%AM01473v18/12Doc ID 7608 Rev 6
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STS5DNF20VPackage mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
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Package mechanical dataSTS5DNF20V
Table 1. SO-8 mechanical data
mm.
Dim.
Min
Typ
Max
Min
Typ
Max
0.069 0.010 0.065 0.020 0.010 A 1.35 A1 0.10 A2 1.10 B 0.33 C 0.19 D
inch
1.75 0.053 0.25 0.004 1.65 0.043 0.51 0.013 0.25 0.007 (1)
4.80 5.00 0.189 0.197 4.00 0.15 6.20 0.228 0.50 0.010 1.27 0.016 0° (min.), 8° (max.)
0.157 0.244 0.020 0.050 E 3.80 H 5.80 h 0.25 L 0.40 k
e 1.27 0.050 ddd 0.10 0.004 1.Dimensions D does not include mold flash, protru-sions or gate burrs. Mold flash, potrusions or gate burrs
shall not exceed 0.15mm (.006inch) in total (both side).
Figure 18.Package dimensions
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